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<title>CMSIS-Core (Cortex-M): PMU Events for Cortex-M55</title>
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   <div id="projectname">CMSIS-Core (Cortex-M)
   &#160;<span id="projectnumber">Version 5.6.0</span>
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   <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
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<div class="header">
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<a href="#define-members">Macros</a>  </div>
  <div class="headertitle">
<div class="title">PMU Events for Cortex-M55<div class="ingroups"><a class="el" href="group__pmu8__functions.html">PMU Functions for Armv8.1-M</a></div></div>  </div>
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<p>IDs for additional events defined for Cortex-M55.  
<a href="#details">More...</a></p>
<table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="define-members"></a>
Macros</h2></td></tr>
<tr class="memitem:gab423c79d244d071407afb49dfcfb6e05"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armcm55.html#gab423c79d244d071407afb49dfcfb6e05">ARMCM55_PMU_ECC_ERR</a>&#160;&#160;&#160;0xC000</td></tr>
<tr class="memdesc:gab423c79d244d071407afb49dfcfb6e05"><td class="mdescLeft">&#160;</td><td class="mdescRight">Any ECC error.  <a href="#gab423c79d244d071407afb49dfcfb6e05">More...</a><br/></td></tr>
<tr class="separator:gab423c79d244d071407afb49dfcfb6e05"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga88ab1b9d04cd44c53a92962fad8e3bdc"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armcm55.html#ga88ab1b9d04cd44c53a92962fad8e3bdc">ARMCM55_PMU_ECC_ERR_FATAL</a>&#160;&#160;&#160;0xC001</td></tr>
<tr class="memdesc:ga88ab1b9d04cd44c53a92962fad8e3bdc"><td class="mdescLeft">&#160;</td><td class="mdescRight">Any fatal ECC error.  <a href="#ga88ab1b9d04cd44c53a92962fad8e3bdc">More...</a><br/></td></tr>
<tr class="separator:ga88ab1b9d04cd44c53a92962fad8e3bdc"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaa644074ec71c49e7e7a45d001bbdfb00"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armcm55.html#gaa644074ec71c49e7e7a45d001bbdfb00">ARMCM55_PMU_ECC_ERR_DCACHE</a>&#160;&#160;&#160;0xC010</td></tr>
<tr class="memdesc:gaa644074ec71c49e7e7a45d001bbdfb00"><td class="mdescLeft">&#160;</td><td class="mdescRight">Any ECC error in the data cache.  <a href="#gaa644074ec71c49e7e7a45d001bbdfb00">More...</a><br/></td></tr>
<tr class="separator:gaa644074ec71c49e7e7a45d001bbdfb00"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga7e31a482a7cf6bf6467487dcf2f89181"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armcm55.html#ga7e31a482a7cf6bf6467487dcf2f89181">ARMCM55_PMU_ECC_ERR_ICACHE</a>&#160;&#160;&#160;0xC011</td></tr>
<tr class="memdesc:ga7e31a482a7cf6bf6467487dcf2f89181"><td class="mdescLeft">&#160;</td><td class="mdescRight">Any ECC error in the instruction cache.  <a href="#ga7e31a482a7cf6bf6467487dcf2f89181">More...</a><br/></td></tr>
<tr class="separator:ga7e31a482a7cf6bf6467487dcf2f89181"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga45cc9a0330e159e4afbce93e3cb5ef2e"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armcm55.html#ga45cc9a0330e159e4afbce93e3cb5ef2e">ARMCM55_PMU_ECC_ERR_FATAL_DCACHE</a>&#160;&#160;&#160;0xC012</td></tr>
<tr class="memdesc:ga45cc9a0330e159e4afbce93e3cb5ef2e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Any fatal ECC error in the data cache.  <a href="#ga45cc9a0330e159e4afbce93e3cb5ef2e">More...</a><br/></td></tr>
<tr class="separator:ga45cc9a0330e159e4afbce93e3cb5ef2e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gabe33023adf35df68a949d13212c379eb"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armcm55.html#gabe33023adf35df68a949d13212c379eb">ARMCM55_PMU_ECC_ERR_FATAL_ICACHE</a>&#160;&#160;&#160;0xC013</td></tr>
<tr class="memdesc:gabe33023adf35df68a949d13212c379eb"><td class="mdescLeft">&#160;</td><td class="mdescRight">Any fatal ECC error in the instruction cache.  <a href="#gabe33023adf35df68a949d13212c379eb">More...</a><br/></td></tr>
<tr class="separator:gabe33023adf35df68a949d13212c379eb"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaca4db507dab60fce8df90f1a4bb862ad"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armcm55.html#gaca4db507dab60fce8df90f1a4bb862ad">ARMCM55_PMU_ECC_ERR_DTCM</a>&#160;&#160;&#160;0xC020</td></tr>
<tr class="memdesc:gaca4db507dab60fce8df90f1a4bb862ad"><td class="mdescLeft">&#160;</td><td class="mdescRight">Any ECC error in the DTCM.  <a href="#gaca4db507dab60fce8df90f1a4bb862ad">More...</a><br/></td></tr>
<tr class="separator:gaca4db507dab60fce8df90f1a4bb862ad"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gafc07c84258939e22cdb3b2e98dee0ac6"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armcm55.html#gafc07c84258939e22cdb3b2e98dee0ac6">ARMCM55_PMU_ECC_ERR_ITCM</a>&#160;&#160;&#160;0xC021</td></tr>
<tr class="memdesc:gafc07c84258939e22cdb3b2e98dee0ac6"><td class="mdescLeft">&#160;</td><td class="mdescRight">Any ECC error in the ITCM.  <a href="#gafc07c84258939e22cdb3b2e98dee0ac6">More...</a><br/></td></tr>
<tr class="separator:gafc07c84258939e22cdb3b2e98dee0ac6"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad82225c528aa89689684fe5ddbe3c637"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armcm55.html#gad82225c528aa89689684fe5ddbe3c637">ARMCM55_PMU_ECC_ERR_FATAL_DTCM</a>&#160;&#160;&#160;0xC022</td></tr>
<tr class="memdesc:gad82225c528aa89689684fe5ddbe3c637"><td class="mdescLeft">&#160;</td><td class="mdescRight">Any fatal ECC error in the DTCM.  <a href="#gad82225c528aa89689684fe5ddbe3c637">More...</a><br/></td></tr>
<tr class="separator:gad82225c528aa89689684fe5ddbe3c637"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga0ed17ac3f8d8865e85d9690cbb51a06b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armcm55.html#ga0ed17ac3f8d8865e85d9690cbb51a06b">ARMCM55_PMU_ECC_ERR_FATAL_ITCM</a>&#160;&#160;&#160;0xC023</td></tr>
<tr class="memdesc:ga0ed17ac3f8d8865e85d9690cbb51a06b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Any fatal ECC error in the ITCM.  <a href="#ga0ed17ac3f8d8865e85d9690cbb51a06b">More...</a><br/></td></tr>
<tr class="separator:ga0ed17ac3f8d8865e85d9690cbb51a06b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad433a568f1a7ae448807f9e71173e6c2"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armcm55.html#gad433a568f1a7ae448807f9e71173e6c2">ARMCM55_PMU_PF_LINEFILL</a>&#160;&#160;&#160;0xC100</td></tr>
<tr class="memdesc:gad433a568f1a7ae448807f9e71173e6c2"><td class="mdescLeft">&#160;</td><td class="mdescRight">A prefetcher starts a line-fill.  <a href="#gad433a568f1a7ae448807f9e71173e6c2">More...</a><br/></td></tr>
<tr class="separator:gad433a568f1a7ae448807f9e71173e6c2"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad10f5c84036644353ee2dfb14b8e9f48"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armcm55.html#gad10f5c84036644353ee2dfb14b8e9f48">ARMCM55_PMU_PF_CANCEL</a>&#160;&#160;&#160;0xC101</td></tr>
<tr class="memdesc:gad10f5c84036644353ee2dfb14b8e9f48"><td class="mdescLeft">&#160;</td><td class="mdescRight">A prefetcher stops prefetching.  <a href="#gad10f5c84036644353ee2dfb14b8e9f48">More...</a><br/></td></tr>
<tr class="separator:gad10f5c84036644353ee2dfb14b8e9f48"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga1fafa33dc3bfb8f717fa04a0b868353c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armcm55.html#ga1fafa33dc3bfb8f717fa04a0b868353c">ARMCM55_PMU_PF_DROP_LINEFILL</a>&#160;&#160;&#160;0xC102</td></tr>
<tr class="memdesc:ga1fafa33dc3bfb8f717fa04a0b868353c"><td class="mdescLeft">&#160;</td><td class="mdescRight">A linefill triggered by a prefetcher has been dropped because of lack of buffering.  <a href="#ga1fafa33dc3bfb8f717fa04a0b868353c">More...</a><br/></td></tr>
<tr class="separator:ga1fafa33dc3bfb8f717fa04a0b868353c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf3fcaa27702154d0739863b6462b8d73"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armcm55.html#gaf3fcaa27702154d0739863b6462b8d73">ARMCM55_PMU_NWAMODE_ENTER</a>&#160;&#160;&#160;0xC200</td></tr>
<tr class="memdesc:gaf3fcaa27702154d0739863b6462b8d73"><td class="mdescLeft">&#160;</td><td class="mdescRight">No write-allocate mode entry.  <a href="#gaf3fcaa27702154d0739863b6462b8d73">More...</a><br/></td></tr>
<tr class="separator:gaf3fcaa27702154d0739863b6462b8d73"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab3f4da2771d4ca5edc9822d9a5353994"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armcm55.html#gab3f4da2771d4ca5edc9822d9a5353994">ARMCM55_PMU_NWAMODE</a>&#160;&#160;&#160;0xC201</td></tr>
<tr class="memdesc:gab3f4da2771d4ca5edc9822d9a5353994"><td class="mdescLeft">&#160;</td><td class="mdescRight">Write-allocate store is not allocated into the data cache due to no-write-allocate mode.  <a href="#gab3f4da2771d4ca5edc9822d9a5353994">More...</a><br/></td></tr>
<tr class="separator:gab3f4da2771d4ca5edc9822d9a5353994"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaadf0341d6a67cd30481201e7a3c7e77b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armcm55.html#gaadf0341d6a67cd30481201e7a3c7e77b">ARMCM55_PMU_SAHB_ACCESS</a>&#160;&#160;&#160;0xC300</td></tr>
<tr class="memdesc:gaadf0341d6a67cd30481201e7a3c7e77b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Read or write access on the S-AHB interface to the TCM.  <a href="#gaadf0341d6a67cd30481201e7a3c7e77b">More...</a><br/></td></tr>
<tr class="separator:gaadf0341d6a67cd30481201e7a3c7e77b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaadf0341d6a67cd30481201e7a3c7e77b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armcm55.html#gaadf0341d6a67cd30481201e7a3c7e77b">ARMCM55_PMU_SAHB_ACCESS</a>&#160;&#160;&#160;0xC300</td></tr>
<tr class="memdesc:gaadf0341d6a67cd30481201e7a3c7e77b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Read or write access on the S-AHB interface to the TCM.  <a href="#gaadf0341d6a67cd30481201e7a3c7e77b">More...</a><br/></td></tr>
<tr class="separator:gaadf0341d6a67cd30481201e7a3c7e77b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga4b3797dce1999fc331ab03acfd2f135f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armcm55.html#ga4b3797dce1999fc331ab03acfd2f135f">ARMCM55_PMU_PAHB_ACCESS</a>&#160;&#160;&#160;0xC301</td></tr>
<tr class="memdesc:ga4b3797dce1999fc331ab03acfd2f135f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Read or write access on the P-AHB interface.  <a href="#ga4b3797dce1999fc331ab03acfd2f135f">More...</a><br/></td></tr>
<tr class="separator:ga4b3797dce1999fc331ab03acfd2f135f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga8e3f50182b0fdacab4b09bb0e4007136"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armcm55.html#ga8e3f50182b0fdacab4b09bb0e4007136">ARMCM55_PMU_AXI_WRITE_ACCESS</a>&#160;&#160;&#160;0xC302</td></tr>
<tr class="memdesc:ga8e3f50182b0fdacab4b09bb0e4007136"><td class="mdescLeft">&#160;</td><td class="mdescRight">Any beat access to M-AXI write interface.  <a href="#ga8e3f50182b0fdacab4b09bb0e4007136">More...</a><br/></td></tr>
<tr class="separator:ga8e3f50182b0fdacab4b09bb0e4007136"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga49e8162cf70ec75017dee7428462f38f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armcm55.html#ga49e8162cf70ec75017dee7428462f38f">ARMCM55_PMU_AXI_READ_ACCESS</a>&#160;&#160;&#160;0xC303</td></tr>
<tr class="memdesc:ga49e8162cf70ec75017dee7428462f38f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Any beat access to M-AXI read interface.  <a href="#ga49e8162cf70ec75017dee7428462f38f">More...</a><br/></td></tr>
<tr class="separator:ga49e8162cf70ec75017dee7428462f38f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga8b005f5e47bc8bf9ee8d84a43b798ca9"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armcm55.html#ga8b005f5e47bc8bf9ee8d84a43b798ca9">ARMCM55_PMU_DOSTIMEOUT_DOUBLE</a>&#160;&#160;&#160;0xC400</td></tr>
<tr class="memdesc:ga8b005f5e47bc8bf9ee8d84a43b798ca9"><td class="mdescLeft">&#160;</td><td class="mdescRight">Denial of Service timeout has fired twice and caused buffers to drain to allow forward progress.  <a href="#ga8b005f5e47bc8bf9ee8d84a43b798ca9">More...</a><br/></td></tr>
<tr class="separator:ga8b005f5e47bc8bf9ee8d84a43b798ca9"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga6bf0106f269b33afbe3482bab385f152"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armcm55.html#ga6bf0106f269b33afbe3482bab385f152">ARMCM55_PMU_DOSTIMEOUT_TRIPLE</a>&#160;&#160;&#160;0xC401</td></tr>
<tr class="memdesc:ga6bf0106f269b33afbe3482bab385f152"><td class="mdescLeft">&#160;</td><td class="mdescRight">Denial of Service timeout has fired three times and blocked the LSU to force forward progress.  <a href="#ga6bf0106f269b33afbe3482bab385f152">More...</a><br/></td></tr>
<tr class="separator:ga6bf0106f269b33afbe3482bab385f152"><td class="memSeparator" colspan="2">&#160;</td></tr>
</table>
<a name="details" id="details"></a><h2 class="groupheader">Description</h2>
<p>IDs for additional events defined for Cortex-M55. </p>
<p>These events are available on a Cortex-M55 device including a PMU. </p>
<h2 class="groupheader">Macro Definition Documentation</h2>
<a class="anchor" id="ga49e8162cf70ec75017dee7428462f38f"></a>
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          <td class="memname">#define ARMCM55_PMU_AXI_READ_ACCESS&#160;&#160;&#160;0xC303</td>
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<p>Any beat access to M-AXI read interface. </p>

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          <td class="memname">#define ARMCM55_PMU_AXI_WRITE_ACCESS&#160;&#160;&#160;0xC302</td>
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<p>Any beat access to M-AXI write interface. </p>

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</div>
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          <td class="memname">#define ARMCM55_PMU_DOSTIMEOUT_DOUBLE&#160;&#160;&#160;0xC400</td>
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<p>Denial of Service timeout has fired twice and caused buffers to drain to allow forward progress. </p>

</div>
</div>
<a class="anchor" id="ga6bf0106f269b33afbe3482bab385f152"></a>
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          <td class="memname">#define ARMCM55_PMU_DOSTIMEOUT_TRIPLE&#160;&#160;&#160;0xC401</td>
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<p>Denial of Service timeout has fired three times and blocked the LSU to force forward progress. </p>

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</div>
<a class="anchor" id="gab423c79d244d071407afb49dfcfb6e05"></a>
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          <td class="memname">#define ARMCM55_PMU_ECC_ERR&#160;&#160;&#160;0xC000</td>
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<p>Any ECC error. </p>

</div>
</div>
<a class="anchor" id="gaa644074ec71c49e7e7a45d001bbdfb00"></a>
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          <td class="memname">#define ARMCM55_PMU_ECC_ERR_DCACHE&#160;&#160;&#160;0xC010</td>
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<p>Any ECC error in the data cache. </p>

</div>
</div>
<a class="anchor" id="gaca4db507dab60fce8df90f1a4bb862ad"></a>
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          <td class="memname">#define ARMCM55_PMU_ECC_ERR_DTCM&#160;&#160;&#160;0xC020</td>
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<p>Any ECC error in the DTCM. </p>

</div>
</div>
<a class="anchor" id="ga88ab1b9d04cd44c53a92962fad8e3bdc"></a>
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          <td class="memname">#define ARMCM55_PMU_ECC_ERR_FATAL&#160;&#160;&#160;0xC001</td>
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<p>Any fatal ECC error. </p>

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</div>
<a class="anchor" id="ga45cc9a0330e159e4afbce93e3cb5ef2e"></a>
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          <td class="memname">#define ARMCM55_PMU_ECC_ERR_FATAL_DCACHE&#160;&#160;&#160;0xC012</td>
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      </table>
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<p>Any fatal ECC error in the data cache. </p>

</div>
</div>
<a class="anchor" id="gad82225c528aa89689684fe5ddbe3c637"></a>
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          <td class="memname">#define ARMCM55_PMU_ECC_ERR_FATAL_DTCM&#160;&#160;&#160;0xC022</td>
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      </table>
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<p>Any fatal ECC error in the DTCM. </p>

</div>
</div>
<a class="anchor" id="gabe33023adf35df68a949d13212c379eb"></a>
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          <td class="memname">#define ARMCM55_PMU_ECC_ERR_FATAL_ICACHE&#160;&#160;&#160;0xC013</td>
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      </table>
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<p>Any fatal ECC error in the instruction cache. </p>

</div>
</div>
<a class="anchor" id="ga0ed17ac3f8d8865e85d9690cbb51a06b"></a>
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          <td class="memname">#define ARMCM55_PMU_ECC_ERR_FATAL_ITCM&#160;&#160;&#160;0xC023</td>
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<p>Any fatal ECC error in the ITCM. </p>

</div>
</div>
<a class="anchor" id="ga7e31a482a7cf6bf6467487dcf2f89181"></a>
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          <td class="memname">#define ARMCM55_PMU_ECC_ERR_ICACHE&#160;&#160;&#160;0xC011</td>
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      </table>
</div><div class="memdoc">

<p>Any ECC error in the instruction cache. </p>

</div>
</div>
<a class="anchor" id="gafc07c84258939e22cdb3b2e98dee0ac6"></a>
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          <td class="memname">#define ARMCM55_PMU_ECC_ERR_ITCM&#160;&#160;&#160;0xC021</td>
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      </table>
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<p>Any ECC error in the ITCM. </p>

</div>
</div>
<a class="anchor" id="gab3f4da2771d4ca5edc9822d9a5353994"></a>
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          <td class="memname">#define ARMCM55_PMU_NWAMODE&#160;&#160;&#160;0xC201</td>
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<p>Write-allocate store is not allocated into the data cache due to no-write-allocate mode. </p>

</div>
</div>
<a class="anchor" id="gaf3fcaa27702154d0739863b6462b8d73"></a>
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          <td class="memname">#define ARMCM55_PMU_NWAMODE_ENTER&#160;&#160;&#160;0xC200</td>
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<p>No write-allocate mode entry. </p>

</div>
</div>
<a class="anchor" id="ga4b3797dce1999fc331ab03acfd2f135f"></a>
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          <td class="memname">#define ARMCM55_PMU_PAHB_ACCESS&#160;&#160;&#160;0xC301</td>
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<p>Read or write access on the P-AHB interface. </p>

</div>
</div>
<a class="anchor" id="gad10f5c84036644353ee2dfb14b8e9f48"></a>
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          <td class="memname">#define ARMCM55_PMU_PF_CANCEL&#160;&#160;&#160;0xC101</td>
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<p>A prefetcher stops prefetching. </p>

</div>
</div>
<a class="anchor" id="ga1fafa33dc3bfb8f717fa04a0b868353c"></a>
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          <td class="memname">#define ARMCM55_PMU_PF_DROP_LINEFILL&#160;&#160;&#160;0xC102</td>
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<p>A linefill triggered by a prefetcher has been dropped because of lack of buffering. </p>

</div>
</div>
<a class="anchor" id="gad433a568f1a7ae448807f9e71173e6c2"></a>
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          <td class="memname">#define ARMCM55_PMU_PF_LINEFILL&#160;&#160;&#160;0xC100</td>
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<p>A prefetcher starts a line-fill. </p>

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</div>
<a class="anchor" id="gaadf0341d6a67cd30481201e7a3c7e77b"></a>
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          <td class="memname">#define ARMCM55_PMU_SAHB_ACCESS&#160;&#160;&#160;0xC300</td>
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<p>Read or write access on the S-AHB interface to the TCM. </p>

</div>
</div>
<a class="anchor" id="gaadf0341d6a67cd30481201e7a3c7e77b"></a>
<div class="memitem">
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          <td class="memname">#define ARMCM55_PMU_SAHB_ACCESS&#160;&#160;&#160;0xC300</td>
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</div><div class="memdoc">

<p>Read or write access on the S-AHB interface to the TCM. </p>

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